EM78808
8-bit Micro-controller
TONE
EST
TONE
Tdp
5~20mS
by S/W
Tgta
30mS Typ.
Tgtp
30mS Typ.
Vtst
ST/GT
Q4..Q1
1/2 VDD
Tpq
8 uS Typ.
STD
LINE_ENG
Fig.22. DTMF receiver timing.
IOCA (CN1’s and CN2’s clock and scaling, PORT7 pull high control)
PAGE0 (Counter1’s and Counter2's clock and scale setting)
7
6
5
4
3
2
1
0
CNT2S
C2P2
C2P1
C2P0
CNT1S
C1P2
C1P1
C1P0
Bit 0~Bit 2(C1P0~C1P2) : Counter1 scaling
C1P2
C1P1
C1P0
COUNTER1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
Bit 3(CNT1S) : Counter1 clock source
0/1 ꢂ16.384kHz/instruction clock
Bit 4~Bit 6(C2P0~C2P2) : Counter2 scaling
C2P2
C2P1
C2P0
COUNTER2
1:2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:4
1:8
1:16
1:32
1:64
1:128
1:256
Bit 7(CNT2S) : Counter2 clock source
0/1 ꢂ16.384kHz/instruction clock
______________________________________________________________________________________________________________________________________________________
* This specification is subject to change without notice.
8/1/2004 (V3.1)
38
ELAN [ ELAN MICROELECTRONICS CORP ]
