EM78808
8-bit Micro-controller
VII.6 Interrupt
RF is the interrupt status register which records the interrupt request in flag bits. IOCF is the interrupt
mask register. TCC timer, Counter1 and Counter2 are internal interrupt source. P70 ~ P77(INT0 ~ INT1) are
external interrupt input which interrupt sources are come from the external. If the interrupts are happened by
these interrupt sources, then RF register will generate '1' flag to corresponding register if you enable IOCF
register. Global interrupt is enabled by ENI instruction and is disabled by DISI instruction. When one of the
interrupts (when enabled) generated, will cause the next instruction to be fetched from address 008H. Once in
the interrupt service routine the source of the interrupt can be determined by polling the flag bits in the RF
register. The interrupt flag bit must be cleared in software before leaving the interrupt service routine and
enabling interrupts to avoid recursive interrupts.
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* This specification is subject to change without notice.
8/1/2004 (V3.1)
45
ELAN [ ELAN MICROELECTRONICS CORP ]
