EM78808
8-bit Micro-controller
PAGE1 (Data RAM data buffer)
7
6
5
4
3
2
1
0
RAMD7
RAMD6
RAMD5
RAMD4
RAMD3
RAMD2
RAMD1
RAMD0
Bit 0 ~ Bit 7 (RAMD0 ~ RAMD7) : Data RAM data buffer for RAM reading or writing.
Ex.
MOV
MOV
MOV
MOV
MOV
MOV
MOV
:
A , @1
RD_PAGE1 , A
A , @0
RE_PAGE1 , A
A , @0x55
RC_PAGE1 , A
A , RC_PAGE1
;write data 0x55 to DATA RAM which address is "0001".
;read data
RD (Comparator control, Data RAM address(0 ~ 7))
PAGE0 (Comparator control bits)
7
6
5
4
3
2
1
0
CMPEN CMPFLAG CMPS1
CMPS0
CMP_B3
CMP_B2
CMP_B1
CMP_B0
If user define PORT63 , PORT64 or PORT65 (by CMPIN1, CMPIN2, CMPIN3 at IOCE page1) as a
comparator input or PORT6. User can use this register to control comparator's function.
Bit 0~Bit 3(CMP_B0~CMP_B3) : Reference voltage selection of internal bias circuit for comparator.
Reference voltage for comparator = VDD x ( n + 0.5 )/ 16 , n = 0 to 15
Bit 4~Bit 5(CMPS0~CMPS1) : Channel selection from CMP1 to CMP3 for comparator
CMPS1
CMPS0
Input
CMP1
CMP2
CMP3
Reserved
0
0
1
1
0
1
0
1
Bit 6(CMPFALG) : Comparator output flag
0 ꢂInput voltage < reference voltage
1 ꢂInput voltage > reference voltage
Bit 7(CMPEN) : Enable control bit of comparator.
0/1 ꢂdisable/enable, When this bit is set to “0”, 2.0V ref circuit is also powered off.
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* This specification is subject to change without notice.
8/1/2004 (V3.1)
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