EM77950
BB Controller
Table 17.1 Values of RST, T and P after a reset
Condition
Power on
RST
0
T
1
P
1
WDTC instruction
*P
*P
*P
1
1
*P
*P
0
WDT timeout
0
SLEP instruction
*P
1
Wake-Up on pin change during SLEEP mode
0
*P: Previous status before reset
15.3 System Set-up Time (SST)
In order to have a successful start up, System Set-up Time (SSU) is employed to
guarantee a stable clock for IC operation. It is made up of two delay sources:
(1) Internal RC Oscillation Set-up Delay (IRCOSUD): Internal RC oscillation shared
with a watchdog timer divided by an 8-bit ripple counter.
(2) Main Oscillation Set-up Delay (MOSUD): A 10-bit ripple counter is used to filter
unstable main clocks at the beginning of power-on before the chip starts to run.
This delay is performed right after IRCOSUD, if enabled
⎛
⎞
1
1
⎛
⎜
⎞
⎟
× 28 +
× 210
⎜
⎜
⎟
⎟
SST =
32.768K
Main Clock
⎝
⎠
⎝
⎠
OSC1
SST
10 - bit Ripple Counter
Internal
RC Osc .
8 - bit Ripple Counter
RCSUTE
Fig. 15 System Set-up Time
84 •
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
