EM77950
BB Controller
13 Circuitry of Input and Output Pins
13.1 Introduction
The EM77950 has six parallel ports, namely Port A, Port B, Port C, Port D, Port E and
Port F. There are 40 available I/O pins. A control bit defines the configuration of its
corresponding pin. Refer to Fig. 3.1 for the Pin Assignment.
The I/O registers, from Port A to Port F, are bidirectional tri-state I/O ports. The I/O
ports can be defined as "input" or "output" pins by the I/O control registers (IOCA, IOCB,
IOCD, IOCE and IOCF) under program control. The I/O registers and I/O control
registers are both readable and writable.
14 Timer/Counter System
14.1 Introduction
The EM77950 provides two timer modules: 8-bit TCC (Timer Clock/Counter), and
16-bit FRC (Free Run Counter). The clock sources of TCC come from one of the
instruction cycles and low frequency oscillator (IRC). The clock source of FRC is from
either the instruction cycle or low frequency oscillator (IRC).
14.2 Time Clock Counter (TCC)
An 8-bit counter is available as prescaler for the TCC. The prescaler ratio is
determined by the PS0~PS2 bits. When in TCC mode, the prescaler is cleared each
time an instruction writes to the TCC.
TCC is an 8-bit timer/counter. If the TCC signal source is from the system clock,
TCC will be incremented by 1 for every instruction cycle (without prescaler).
If the TCC signal source is from the IRC clock input, TCC will be incremented by 1
on every falling edge or rising edge of the TCC pin.
The prescaler counter (PRC) can be read from Address 0x0F. In other words, the
combination of TCC and PRC can be used as a 16-bit counter without prescaler
14.2.1 Block Diagram of TCC
Data Bus
TCCS0
TCCE
0
Fosc
Sync with
Internal
Clock
M
U
X
PRC (8- bit Counter)
TCC
1
2
clocks delay
IRC
PS0
TCCOF
PS1
PS2
8-1 MUX
Fig. 14-1 Function Block Diagram of TCC
80 •
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
