EM77950
BB Controller
9.4 Transceiver Timing
SPIE
SCK
CES = 1
SCK
CES = 0
SDO
SDOD = 0
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
SDO
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
SDOD = 1
Bit
Bit
SDI
SDID = 0
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
6
6
SDI
SDID = 1
Bit
Bit
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
6
6
RBF
Fig. 9-2 SPI Transceiver Timing
9.5 Related Registers with SPI
As the SPI mode is defined, the related registers of this operation are shown below:
SPIRB (0x1D): Serial peripheral interface read Register
SPIWB (0x1E): Serial peripheral interface write Register
INTF (0X11): Interrupt flag
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ADIF
RBFIF
PWM1IF
PWM0IF
EINT1F
EINT0F
TCCOF
FRCOF
PRIE (0x80): Peripherals enable control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPIE
-
BBE
ADE
PWM1E
PWM0E
TCCE
FRCE
INTE (0X81): Interrupt enable control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GIE
RBFIE
PWM1IE PWM0IE
EINT1E
EINT0E
TCCOE
FRCOE
SPIC (0X85): SPI control.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPI_RBF
CES
SBR2
SBR1
SBR0
SDID
SDOD
SPIS
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
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