EM65570
68COM/ 98SEG 65K Color STN LCD Driver
8.2.3 n Line Alternate Register (N)
D7 D6 D5 D4 D3 D2 D1 D0
N3 N2 N1 N0
(At the time of reset: {N3, N2, N1, N0} =0H, read address: 4H)
CSB RS RDB WRB RE2 RE1 RE0
0
0
1
0
0
1
1
0
0
0
0
D7 D6 D5 D4 D3 D2 D1 D0
N6 N5 N4
CSB RS RDB WRB RE2 RE1 RE0
0
1
0
1
0
1
1
0
0
0
0
*
* Don’t Care
(At the time of reset: {N6, N5, N4} =0H, read address: 5H)
A number of the reverse lines in the LCD alternate drive is required in setting the
register. This number of lines is limited to between 2 and 67 lines. The values set up
by the alternate register will be enabled when the NLIN control bit is “1.” When the
NLIN control bit is “0,” the alternate drive waveform reverses when each frame is
generated.
N6
0
N5
0
N4
0
N3
0
N2
0
N1
0
N0
0
Line Address
-
0
0
0
0
0
0
1
2
：
：
0
：
：
67
1
0
0
0
1
1
NLIN = ”0” (with 1/68 DUTY Display):
1st Line
2nd Line 3rd Line
67st Line
68th Line 1st Line
LP
FLM
M
Figure 8-2a NLINE = “0” Alternate Timing Diagram
60 •
Product Specification (V1.0) 09.05.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
