EM65570
68COM/ 98SEG 65K Color STN LCD Driver
5. The following shows address increment in window function access.
Transition of AX and AY Register
Transition of X and Y Address
AX:
AY:
START
Address Address+1
START
END
Address
Same as AX and AY register
When each AX exceed AE, increment AY
START
Address
START
Address+1
END
Address
Under each operation mode, the following increment operation is performed:
When gradation display mode and 8-bit access are selected, address is
incremented as described above.
When gradation display mode and 16-bit access are selected, the following
increment processing occurs:
1) Accessing the RAM after every two bytes are accessed.
2) The X-addresses increments in the order of 00H, 01H,…2FH, and 30H.
8.2.7 Power Control Register
D7 D6 D5 D4
D3
D2
D1
D0
CSB RS RDB WRB RE2 RE1 RE0
1
0
0
1
AMPON HALT DCON ACL
0
1
1
0
0
0
0
(At the time of reset: {AMPON, HALT, DCON, ACL} = 0H, read address: 9H)
ACL
The internal circuit can be initialized as follows:
ACL = “0”: Normal operation
ACL = “1”: Initialization ON
When the reset operation begins internally after the ACL register is set to “1,” the ACL
register is automatically cleared to “0.” The internal reset signal is generated with a
clock (built-in oscillation circuit or CK input) for the display. Therefore, install at least
two cycles for the WAIT period for the clock display. After the WAIT period elapsed, the
next operation is processed.
DCON
Sets ON/OFF the internal booster circuit:
DCON = “0”: Booster circuit OFF
DCON = ”1”: Booster circuit ON
64 •
Product Specification (V1.0) 09.05.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
