EM65570
68COM/ 98SEG 65K Color STN LCD Driver
8.1.3 Control Register Table (Bank 4)
Pins (for 80-Family) & Bank
Address & Code
Control Register
Function
CSB RS WRB RDB RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0
Start Address for
Line Reverse
(Lower Nibble)
[0H]
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
LS3 LS2 LS1 LS0
Set start line for line reverse
display
Start Address for
Line Reverse
(Upper Nibble)
[1H]
[2H]
[3H]
LS6 LS5 LS4
*
End Address for
Line Reverse
(Lower Nibble)
LE3 LE2 LE1 LE0
Set end line for line reverse
display
End Address for
Line Reverse
(Upper Nibble)
LE6 LE5 LE4
*
Line Reverse &
Burst RAM
Write Control
Line reverse & burst RAM
write control
[4H]
[5H]
[6H]
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
1
0
1
0
BST BT LREV
*
EEPROM Mode
Select
M1 M0
0
EEPROM mode select
*
Vop Calibration
Offset
CV3 CV2 CV1 CV0
(Lower Nibble)
Vop calibration offset select
Vop calibration
offset
(Upper Nibble)
[7H]
[AH]
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
1
1
0
1
1
1
0
CV5 CV4
*
*
*
*
EEPROM address
Select
NIB1 NIB0 Select EEPROM address
TST0: for LS1 test, Must set
to "0"
Register Access
Control
TS
T0
[FH]
0
1
0
1
0/1 0/1 0/1
1
1
1
1
RE2 RE1 RE0
RE: set register bank
number
NOTE: Address for the control register are enclosed in brackets [ ].
* Don’t Care
NOTE
Use of Control Registers [8H], [9H], [BH] ~ [EH] is prohibited.
Product Specification (V1.0) 09.05.2005
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
