EM65101
128COM/160SEG 16 Gray Scale Level LCD Driver
7.4 Internal Register Read
When reading data from the display RAM, a dummy read is initially required. The
designated address data is not output to the read operation immediately after the
address is set to the AX or AY register. It is output when the second data is read.
Dummy read is always initially required after address is set and the write cycle is
started.
7.4.1 Read Display RAM Operation
WRB
D7~D0
n
***
n
n+1
n+2
Address set (AX,AY)
Address = n
Dummy
Read
Data Read
Address=n
Data Read
Address=n+1
Data Read
Address=n+2
RDB
RS
Figure 7-7 Read Display RAM Operation
The EM65101 can read the control registers. When issuing a control register read
operation, the upper data bus nibble (D7-D4) is used for the register address (0 to FH).
Up to 16 registers can be accessed directly. However, more than 16 registers are
provided. To solve this over supply problem, the EM65101 uses the register bank
control to access the RE register with a bank number. You can access the RE register
through any bank. The following lists the steps to be taken when accessing the specific
register using the bank access control.
1. Write 01H to the RE register for accessing the RA register.
2. Write the specific register address to the RA register.
3. Write the specific register bank to the RE register.
4. Read the specific register contents.
7.4.2 Register Read Operation
WRB
01H
addr
bank
data
D0~D7
RDB
RS
Bank number write
to RE for RA
Address write
to RA
Bank number
write to RE
read specific
register
Figure 7-8 Register Read Operation
Product Specification (V0.4) 08.15.2005
• 19
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
