EM65101
128COM/160SEG 16 Gray Scale Level LCD Driver
7.7 LCD Driver Output Timing
Display timing at Normal (not reverse mode), 1/128 Duty.
127 128
1
2
3
128
1
2
3
128
1
LP
FLM
M
V0
V1
COM0
COM1
SEG0
SEG1
V4
V4
VSS
V1
VSS
V1
V0
V1
V4
V3
V4
VSS
V2
V0
V2
V0
V2
V3
VSS
V3
V0
V2
V3
V3
VSS
Figure 7-10 Normal Mode Display Timing Diagram
7.7.1 LCD Drive Circuit
This drive circuit generates four levels of LCD drive voltages. The circuit has
160-segment outputs and 128-common outputs and the outputs combine the display
data and internal signal M. The common drive circuit that contains a shift register
sequentially outputs common scan signals.
7.7.2 Oscillator Circuit
The EM65101 provides a CR oscillator. The output from this oscillator is used as the
timing source for display signal and clock source for the clock booster.
When the external clock is used, the clock source is fed to the CK pin.
The duty cycle of the external clock must be 50%.
22 •
Product Specification (V0.4) 08.15.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
