HM5225165B/HM5225805B/HM5225405B-75/A6/B6
AC Characteristics (Ta = 0 to +70°C, VCC, VCCQ = 3.3 V ± 0.3 V, VSS, VSSQ = 0 V)
HM5225165B/
HM5225805B/
HM5225405B
-75
-A6
-B6
PC/100
Symbol Symbol Min Max
Parameter
Min Max
Min Max
Unit Notes
System clock cycle time
(CAS latency = 2)
tCK
Tclk
Tclk
Tch
Tcl
10
—
—
—
—
10
10
3
—
—
—
—
15
10
3
—
—
—
—
ns
ns
ns
ns
1
(CAS latency = 3)
CLK high pulse width
CLK low pulse width
tCK
7.5
2.5
2.5
tCKH
tCKL
1
1
3
3
Access time from CLK
(CAS latency = 2)
tAC
tAC
tOH
tLZ
Tac
Tac
Toh
—
—
2.7
2
6
—
—
3
6
—
—
3
8
ns
ns
ns
ns
1, 2
(CAS latency = 3)
5.4
—
—
6
6
Data-out hold time
—
—
—
—
1, 2
CLK to Data-out low
impedance
2
2
1, 2, 3
CLK to Data-out high
impedance
tHZ
—
5.4
—
6
—
6
ns
1, 4
(CAS latency = 2, 3)
Input setup time
tAS, tCS, tDS, Tsi
tCES
1.5
1.5
0.8
67.5
45
—
—
—
—
2
—
—
—
—
2
—
—
—
—
ns
ns
ns
ns
1, 5, 6
CKE setup time for power
down exit
tCESP
Tpde
2
2
1
Input hold time
tAH, tCH, tDH, Thi
tCEH
1
1
1, 6
1
Ref/Active to Ref/Active
command period
tRC
Trc
70
70
Active to Precharge
command period
tRAS
Tras
Trcd
Trp
120000 50
120000 50
120000 ns
1
Active command to column tRCD
command (same bank)
20
—
—
—
—
20
20
20
20
—
—
—
—
20
20
20
20
—
—
—
—
ns
ns
ns
ns
1
Precharge to active
command period
tRP
20
1
Write recovery or data-in to tDPL
precharge lead time
Tdpl
Trrd
15
1
Active (a) to Active (b)
command period
tRRD
15
1
Transition time (rise and fall) tT
Refresh period tREF
1
5
1
5
1
5
ns
—
64
—
64
—
64
ms
Data Sheet E0082H10
50
ELPIDA [ ELPIDA MEMORY ]
