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EDS2532CABJ-75L-E 参数 Datasheet PDF下载

EDS2532CABJ-75L-E图片预览
型号: EDS2532CABJ-75L-E
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 48 页 / 637 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2532CABJ  
Read with auto precharge to Write command interval  
1. Different bank: When some banks are in the active state, the second write command (another bank) is executed.  
However, DQM must be set High so that the output buffer becomes High-Z before data input. The internal auto-  
precharge of one bank starts at the next clock of the second command.  
CLK  
Command  
BS  
READA  
WRIT  
in B0  
CL = 2  
DQM  
CL = 3  
DQ (input)  
in B1  
in B2  
in B3  
DQ (output)  
High-Z  
BL = 4  
bank0  
ReadA  
bank3  
Write  
Note: Internal auto-precharge starts at the timing indicated by "  
".  
Read with Auto Precharge to Write Command Interval (Different bank)  
2. Same bank: The consecutive write command from read with auto precharge (the same bank) is illegal. It is  
necessary to separate the two commands with a bank active command.  
Write with auto precharge to Read command interval  
1. Different bank: When some banks are in the active state, the second read command (another bank) is executed.  
However, in case of a burst write, data will continue to be written until one clock before the read command is  
executed. The internal auto-precharge of one bank starts at 2 clocks later from the second command.  
CLK  
Command  
BS  
WRITA  
in A0  
READ  
DQM  
DQ (input)  
DQ (output)  
out B0  
out B1  
out B2 out B3  
CL = 3  
BL = 4  
bank0  
WriteA  
bank3  
Read  
Note: Internal auto-precharge starts at the timing indicated by "  
".  
Write with Auto Precharge to Read Command Interval (Different bank)  
2. Same bank: The consecutive read command from write with auto precharge (the same bank) is illegal. It is  
necessary to separate the two commands with a bank active command.  
Data Sheet E0460E40 (Ver. 4.0)  
33  
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