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EDS2532CABJ-75L-E 参数 Datasheet PDF下载

EDS2532CABJ-75L-E图片预览
型号: EDS2532CABJ-75L-E
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 48 页 / 637 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2532CABJ  
DQM Control  
The DQM mask the DQ data. The UDQM and LDQM mask the upper and lower bytes of the DQ data, respectively.  
The timing of UDQM/LDQM is different during reading and writing.  
Reading  
When data is read, the output buffer can be controlled by DQM. By setting DQM to Low, the output buffer becomes  
Low-Z, enabling data output. By setting DQM to High, the output buffer becomes High-Z, and the corresponding  
data is not output. However, internal reading operations continue. The latency of DQM during reading is 2 clocks.  
Writing  
Input data can be masked by DQM. By setting DQM to Low, data can be written. In addition, when DQM is set to  
High, the corresponding data is not written, and the previous data is held. The latency of DQM during writing is 0  
clock.  
CLK  
DQM  
High-Z  
DQ  
out 0  
out 1  
out 3  
lDOD = 2 Latency  
Reading  
CLK  
DQM  
DQ  
in 3  
in 0  
in 1  
lDID = 0 Latency  
Writing  
Data Sheet E0460E40 (Ver. 4.0)  
37  
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