EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA
Write command to Read command interval:
1. Same bank, same ROW address: When the read command is executed at the same ROW address of the same
bank as the preceding write command, the read command can be performed after an interval of no less than 1
clock. However, in the case of a burst write, data will continue to be written until one clock before the read
command is executed.
CLK
Command
DQM
WRIT
in A0
READ
DQ (input)
DQ (output)
out B0
out B1
out B2
out B3
Burst Write Mode
CL = 2
Column = A
Write
/CAS Latency
Column = B
Read
Column = B
Dout
BL = 4
Bank 0
WRITE to READ Command Interval (1)
CLK
WRIT
in A0
READ
Command
DQM
DQ (input)
in A1
DQ (output)
out B0
out B1
out B2
out B3
Burst Write Mode
CL = 2
Column = A
Write
/CAS Latency
Column = B
Read
Column = B
Dout
BL = 4
Bank 0
WRITE to READ Command Interval (2)
2. Same bank, different ROW address: When the ROW address changes, consecutive read commands cannot be
executed; it is necessary to separate the two commands with a precharge command and a bank active
command.
3. Different bank: When the bank changes, the read command can be performed after an interval of no less than 1
clock, provided that the other bank is in the bank active state. However, in the case of a burst write, data will
continue to be written until one clock before the read command is executed (as in the case of the same bank and
the same address).
Data Sheet E0110E30 (Ver. 3.0)
34
ELPIDA [ ELPIDA MEMORY ]
