EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA
Burst Stop Command
During a read cycle, when the burst stop command is issued, the burst read data are terminated and the data bus
goes to High-Z after the /CAS latency from the burst stop command.
CLK
READ
BST
Command
High-Z
High-Z
DQ
out
out
out
out
out
(CL = 2)
DQ
(CL = 3)
out
Burst Stop at Read
During a write cycle, when the burst stop command is issued, the burst write data are terminated and data bus goes
to High-Z at the same clock with the burst stop command.
CLK
WRITE
in
BST
Command
DQ
High-Z
in
in
in
Burst Stop at Write
Data Sheet E0110E30 (Ver. 3.0)
30
ELPIDA [ ELPIDA MEMORY ]
