EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA
Write command to Write command interval
1. Same bank, same ROW address: When another write command is executed at the same ROW address of the
same bank as the preceding write command, the second write can be performed after an interval of no less than
1 clock. In the case of burst writes, the second write command has priority.
CLK
Command
Address
WRIT
ACT
Row
WRIT
Column B
Column A
BS
DQ
in A0
in B2 in B3
in B0 in B1
Bank0
Active
Column =A Column =B
Write Write
Burst Write Mode
BL = 4
Bank 0
WRITE to WRITE Command Interval (same ROW address in same bank)
2. Same bank, different ROW address: When the ROW address changes, consecutive write commands cannot be
executed; it is necessary to separate the two write commands with a precharge command and a bank active
command.
3. Different bank: When the bank changes, the second write can be performed after an interval of no less than 1
clock, provided that the other bank is in the bank active state. In the case of burst write, the second write
command has priority.
CLK
Command
Address
ACT
WRIT WRIT
ACT
Column A
Column B
Row 1
Row 0
BS
DQ
in A0
in B2 in B3
in B0 in B1
Burst Write Mode
BL = 4
Bank0
Active
Bank3 Bank0 Bank3
Active Write Write
WRITE to WRITE Command Interval (different bank)
Data Sheet E0110E30 (Ver. 3.0)
32
ELPIDA [ ELPIDA MEMORY ]
