EDJ1108BABG, EDJ1116BABG
[Self-Refresh Mode Summary]
MR2
Allowed operating temperature range
for self-refresh mode
A6
0
A7
0
Self-refresh operation
Self-refresh rate appropriate for the Normal Temperature Range
Normal (0°C to +85°C)
Self-refresh rate appropriate for either the Normal or Extended
Temperature Ranges. The DRAM must support Extended
Temperature Range. The value of the SRT bit can effect self-
refresh power consumption, please refer to the Self- refresh
Current for details.
ASR enabled (for devices supporting ASR and Normal
Temperature Range). Self-refresh power consumption is
temperature dependent
0
1
1
0
Normal and Extended (0°C to +95°C)
Normal (0°C to +85°C)
ASR enabled (for devices supporting ASR and Extended
Temperature Range). Self-refresh power consumption is
temperature dependent
1
1
0
1
Normal and Extended (0°C to +95°C)
Illegal
Dynamic ODT (Rtt_WR)
DDR3 SDRAM introduces a new feature “Dynamic ODT”. In certain application cases and to further enhance signal
integrity on the data bus, it is desirable that the termination strength of the DDR3 SDRAM can be changed without
issuing an MRS command. MR2 register locations A9 and A10 configure the Dynamic ODT settings. In Write
leveling mode, only RTT_Nom is available. For details on Dynamic ODT operation, refer to “Dynamic ODT”.
Data Sheet E1248E40 (Ver. 4.0)
89
ELPIDA [ ELPIDA MEMORY ]
