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EDJ1108BABG-AC-E 参数 Datasheet PDF下载

EDJ1108BABG-AC-E图片预览
型号: EDJ1108BABG-AC-E
PDF下载: 下载PDF文件 查看货源
内容描述: 1G位DDR3 SDRAM [1G bits DDR3 SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 148 页 / 1878 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第48页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第49页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第50页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第51页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第53页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第54页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第55页浏览型号EDJ1108BABG-AC-E的Datasheet PDF文件第56页  
EDJ1108BABG, EDJ1116BABG  
-GL, -GN  
1600  
-DG, -DJ  
1333  
Data rate (Mbps)  
Parameter  
Symbol  
tCKSRX  
tCKSRX  
tXS  
min.  
max.  
min.  
10  
5
tRFC (min.) +  
10  
max.  
Unit  
ns  
Notes  
27  
Valid clock requirement before self-  
refresh exit or power-down exit  
10  
5
nCK  
ns  
27  
tRFC (min.) +  
10  
5
Exit self-refresh to commands not  
requiring  
a locked DLL  
27  
tXS  
5
nCK  
nCK  
27  
Exit self-refresh to commands requiring  
a locked DLL  
tXSDLL  
tDLLK (min.)  
tDLLK (min.)  
Auto-refresh to active/auto-refresh  
tRFC  
tREFI  
110  
110  
ns  
command time  
Average periodic refresh interval  
(0°C TC +85°C)  
(+85°C < TC +95°C)  
7.8  
3.9  
7.8  
3.9  
µs  
tREFI  
tCKE  
tCKE  
tXPR  
tXPR  
tDLLK  
tPD  
µs  
5
5.625  
ns  
27  
27  
27  
27  
CKE minimum pulse width  
(high and low pulse width)  
3
3
nCK  
ns  
tRFC (min.)+10  
tRFC (min.)+10  
Exit reset from CKE high to a valid  
command  
5
5
nCK  
nCK  
DLL locking time  
512  
512  
Power-down entry to exit time  
tCKE (min.)  
9 × tREFI tCKE (min.)  
9 × tREFI  
15  
2
Exit precharge power-down with DLL  
frozen to commands requiring a locked  
DLL  
Exit power-down with DLL on to any  
valid command; Exit precharge power-  
down with DLL frozen to commands  
not requiring a locked DLL  
tXPDLL  
tXPDLL  
tXP  
24  
10  
6
24  
10  
6
ns  
nCK  
ns  
2
27  
tXP  
3
3
nCK  
27  
Command pass disable/enable delay tCPDED  
Timing of last ACT command to power-  
1
1
1
1
nCK  
nCK  
tACTPDEN  
20  
20  
down entry  
Timing of last PRE command to power-  
tPRPDEN  
tRDPDEN  
1
1
nCK  
nCK  
down entry  
Timing of last READ/READA command  
to power-down entry  
RL + 4 + 1  
RL + 4 + 1  
Timing of last WRIT command to  
WL + 4 +  
WL + 4 +  
power-down entry  
tWRPDEN  
tWRPDEN  
tWRAPDEN  
nCK  
nCK  
nCK  
9
tWR/tCK (avg)  
tWR/tCK (avg)  
(BL8MRS, BL8OTF, BC4OTF)  
WL + 2 +  
tWR/tCK (avg)  
WL + 2 +  
tWR/tCK (avg)  
(BC4MRS)  
9
Timing of last WRITA command to  
power-down entry  
(BL8MRS, BL8OTF, BC4OTF)  
WL + 4 +  
WR + 1  
WL + 4 +  
WR + 1  
10  
WL + 2 +  
WR + 1  
WL + 2 +  
WR + 1  
(BC4MRS)  
tWRAPDEN  
tREFPDEN  
nCK  
nCK  
10  
Timing of last REF command to power-  
down entry  
1
1
20, 21  
Timing of last MRS command to  
power-down entry  
tMRSPDEN tMOD (min.)  
tMOD (min.)  
Data Sheet E1248E40 (Ver. 4.0)  
52  
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