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EDD1208ALTA-7A 参数 Datasheet PDF下载

EDD1208ALTA-7A图片预览
型号: EDD1208ALTA-7A
PDF下载: 下载PDF文件 查看货源
内容描述: 128 M位同步DRAM是双倍数据速率( 4 -银行, SSTL_2 ) [128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 78 页 / 1650 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDD1204ALTA, EDD1208ALTA, EDD1216ALTA  
4.5 Command Truth Table for CKE  
Current State  
CKE  
n-1  
/CS /RAS /CAS /WE Add Command  
Action  
Notes  
2
n
x
Self refresh  
H
L
x
H
L
x
x
x
x
x
x
x
x
x
x
H
x
x
x
x
x
x
V
x
H
L
x
x
H
x
x
x
V
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
V
x
x
ILLEGAL(Impossible)  
H
SREX  
Exit S.R, self refresh recovery  
H
x
H
x
L
H
H
H
L
L
H
H
L
Maintain self refresh  
Nop (Idle after tRC)  
Nop (Idle after tRC)  
ILLEGAL  
Self refresh recovery  
Power down  
H
L
x
x
x
DESL  
NOP  
H
x
H
x
x
x
x
x
ILLEGAL (Impossible)  
ILLEGAL (Impossible)  
Exit power down, Idle  
H
L
x
x
x
x
H
H
L
x
x
x
PDEX  
H
x
H
x
L
H
H
H
H
H
H
H
L
L
H
L
L
L
L
L
L
x
Maintain power down  
All banks idle  
V
H
L
L
L
L
L
x
V
x
V
x
Refer to operative command table  
PWDN Power down entry  
PWDN Power down entry  
ILLEGAL  
1
1
H
x
H
x
H
L
L
x
L
H
L
x
ILLEGAL  
ILLEGAL  
SELF  
Self refresh entry  
1
1
Power down  
Row active  
H
L
x
x
x
x
Refer to operative command table  
Power down  
x
x
x
x
Any state except  
listed above  
H
H
L
H
L
x
V
x
V
x
V
x
Refer to operative command table  
ILLEGAL  
x
x
x
ILLEGAL (Impossible)  
Remark H = High level, L = Low level, x = High or Low level (Don't care), V = Valid,  
Add = Address (A0 - A11, BA0, BA1),  
ILLEGAL = Device operation and/or data-integrity are not guaranteed  
Notes 1. Self refresh can be entered only from all banks idle state.  
Power down can be entered only from all banks idle or row active state.  
2. CKE low to high transition will re-enable CLK and other inputs asynchronously.  
A Minimum setup time must be satisfied before any command other than exit.  
20  
Preliminary Data Sheet E0136E30  
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