EDD1204ALTA, EDD1208ALTA, EDD1216ALTA
(3/3)
Current state
/CS /RAS /CAS /WE
Address
Command
DESL
Action
Nop (Row active after tWR)
Nop (Row active after tWR)
Nop (Row active after tWR)
Begin read/read with AP
Begin new write/write with AP
ILLEGAL
Notes
Write recovering
H
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
x
H
H
H
H
L
x
H
H
L
x
H
L
H
L
H
L
H
L
L
x
x
x
x
NOP
BST
BA, CA, A10 READ/READA
BA, CA, A10 WRIT/WRITA
L
H
H
L
BA, RA
ACT
2
L
BA, A10
PRE/PALL
REF/SELF
MRS
ILLEGAL
2
L
x
ILLEGAL
L
L
Op-Code
ILLEGAL
L
L
Op-Code
EMRS
DESL
ILLEGAL
Write recovering
x
x
x
x
x
Nop (Idle after tDAL)
Nop (Idle after tDAL)
ILLEGAL
with auto precharge
H
H
H
H
L
H
H
L
H
L
H
L
H
L
H
L
L
x
NOP
BST
BA, CA, A10 READ/READA
BA, CA, A10 WRIT/WRITA
ILLEGAL
L
ILLEGAL
H
H
L
BA, RA
ACT
ILLEGAL
2
2
L
BA, A10
PRE/PALL
REF/SELF
MRS
ILLEGAL
L
x
ILLEGAL
L
L
Op-Code
ILLEGAL
L
L
Op-Code
EMRS
ILLEGAL
Refresh
x
x
x
x
x
x
x
x
DESL
Nop (Idle after tRFC)
Nop (Idle after tRFC)
Nop (Idle after tRFC)
ILLEGAL
H
H
H
L
H
H
L
H
L
x
NOP
BST
2
2
3
READ/WRIT
ACT/PRE/PALL
H
L
x
ILLEGAL
L
x
REF/SELF/MRS/E ILLEGAL
MRS
Mode register
accessing
H
L
L
L
L
x
H
H
H
L
x
H
H
x
x
H
L
x
x
x
x
x
x
DESL
Nop (Idle after tMRD)
NOP
Nop (Idle after tMRD)
ILLEGAL
BST
2
2
2
READ/WRIT
ILLEGAL
x
x
ACT/PRE/PALL/R ILLEGAL
EF/SELF/MRS/EM
RS
Remark H = High level, L = Low level, x = High or Low level (Don't care),
BA = Bank address, RA = Row address, CA = Column address, A10 = Precharge control address,
Op-Code = Operand code, Nop = No operation, AP = Auto precharge,
ILLEGAL = Device operation and/or data-integrity are not guaranteed
Notes 1. All entries assume that CKE is active (High level) during the preceding clock cycle and the current clock
cycle.
2. ILLEGAL to bank in specified states; function may be legal in the bank indicated by BA0, BA1 depending on
the state of that bank.
3. Nop to bank precharging or in idle state. May precharge bank indicated by BA0, BA1.
4. ILLEGAL if any bank is not idle.
5. ILLEGAL if tRAS is not satisfied.
6. Must satisfy command interval and/or burst terminate condition.
19
Preliminary Data Sheet E0136E30