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EBE10AD4AGFA 参数 Datasheet PDF下载

EBE10AD4AGFA图片预览
型号: EBE10AD4AGFA
PDF下载: 下载PDF文件 查看货源
内容描述: 注册1GB DDR2 SDRAM DIMM [1GB Registered DDR2 SDRAM DIMM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 23 页 / 199 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EBE10AD4AGFA  
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)  
Parameter  
Symbol Grade  
max.  
Unit  
Test condition  
one bank; tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
-6E  
-5C  
-4A  
2570  
2440  
2120  
Operating current  
(ACT-PRE)  
IDD0  
IDD1  
IDD2P  
mA  
one bank; IOUT = 0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
-6E  
-5C  
-4A  
2920  
2760  
2430  
tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
Operating current  
(ACT-READ-PRE)  
mA  
all banks idle;  
tCK = tCK (IDD);  
CKE is L;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
-6E  
-5C  
-4A  
750  
700  
620  
Precharge power-down  
standby current  
mA  
mA  
all banks idle;  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
-6E  
IDD2Q -5C  
-4A  
1020  
970  
840  
Precharge quiet standby  
current  
all banks idle;  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are  
SWITCHING;  
-6E  
-5C  
-4A  
1200  
1060  
930  
Idle standby current  
IDD2N  
mA  
Data bus inputs are SWITCHING  
all banks open;  
tCK = tCK (IDD);  
CKE is L;  
Other control and  
address bus inputs are  
STABLE;  
Data bus inputs are  
FLOATING  
-6E  
IDD3P-F -5C  
-4A  
1290  
1240  
1110  
Fast PDN Exit  
MRS(12) = 0  
mA  
mA  
Active power-down standby  
current  
-6E  
IDD3P-S -5C  
-4A  
1020  
970  
840  
Slow PDN Exit  
MRS(12) = 1  
all banks open;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Other control and address bus inputs are  
SWITCHING;  
-6E  
-5C  
-4A  
1850  
1720  
1580  
Active standby current  
IDD3N  
IDD4R  
mA  
mA  
mA  
Data bus inputs are SWITCHING  
all banks open, continuous burst reads, IOUT = 0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP  
(IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
-6E  
-5C  
-4A  
4270  
3660  
3060  
Operating current  
(Burst read operating)  
all banks open, continuous burst writes;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
-6E  
IDD4W -5C  
-4A  
4090  
3660  
3060  
Operating current  
(Burst write operating)  
Preliminary Data Sheet E0865E11 (Ver. 1.1)  
11