EBD25UC8AAFA
Timing Parameter Measured in Clock Cycle for unbuffered DIMM
Number of clock cycle
Parameter
Symbol
tWPD
tRPD
min.
max.
Unit
tCK
tCK
tCK
Write to pre-charge command delay (same bank)
Read to pre-charge command delay (same bank)
Write to read command delay (to input all data)
3 + BL/2
BL/2
tWRD
2 + BL/2
Burst stop command to write command delay
(CL = 2)
(CL = 2.5)
Burst stop command to DQ High-Z
(CL = 2)
(CL = 2.5)
tBSTW
tBSTW
tBSTZ
tBSTZ
2
tCK
tCK
tCK
tCK
3
2
2
2.5
2.5
Read command to write command delay
(to output all data)
(CL = 2)
tRWD
2 + BL/2
tCK
(CL = 2.5)
Pre-charge command to High-Z
(CL = 2)
tRWD
tHZP
3 + BL/2
2
tCK
tCK
2
(CL = 2.5)
tHZP
tWCD
tWR
2.5
1
2.5
1
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
Write command to data in latency
Write recovery
2
DM to data in latency
tDMD
tMRD
tSNR
tSRD
tPDEX
0
0
Mode register set command cycle time
Self refresh exit to non-read command
Self refresh exit to read command
Power down exit to command input
2
75
200
1
Data Sheet E0360E20 (Ver. 2.0)
13
ELPIDA [ ELPIDA MEMORY ]
