EDJ2108EEBG, EDJ2116EEBG
IDD
IDDQ
VDD
VDDQ
/RESET
CK, /CK
DDR3
SDRAM
RTT = 25Ω
DQS, /DQS,
DQ, DM,
CKE
/CS
VDDQ/2
TDQS, /TDQS
/RAS, /CAS, /WE
Address, BA
ODT
ZQ
VSSQ
VSS
Figure 2: Measurement Setup and Test Load for IDD and IDDQ Measurements
Application specific
memory channel
environment
IDDQ
Test load
Channel
I/O power
simulation
IDDQ
measurement
IDDQ
simulation
Correlation
Correction
Channel I/O power
number
Figure 3: Correlation from Simulated Channel I/O Power to Actual Channel I/O Power
Supported by IDDQ Measurement
Data Sheet E1750E31 (Ver. 3.1)
9
ELPIDA [ ELPIDA MEMORY ]
