DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 237: WATCHDOG_CTRL_REG (0x50003102)
Bit
15:2
1
Mode Symbol
Description
Reserved
Reserved
Reset
-
-
0x0
0x0
0x0
-
-
0
R/W
NMI_RST
0 = Watchdog timer generates NMI at value 0, and WDOG
(SYS) reset at <=-16. Timer can be frozen /resumed using
SET_FREEZE_REG[FRZ_WDOG]/
RESET_FREEZE_REG[FRZ_WDOG].
1 = Watchdog timer generates a WDOG (SYS) reset at value
0 and can not be frozen by Software.
Note that this bit can only be set to 1 by SW and only be
reset with a WDOG (SYS) reset or SW reset.
The watchdog is always frozen when the Cortex-M0 is halted
in DEBUG State.
Table 238: CHIP_ID1_REG (0x50003200)
Bit
Mode Symbol
CHIP_ID1
Description
Reset
7:0
R
First character of device type "580" in ASCII.
0x35
Table 239: CHIP_ID2_REG (0x50003201)
Bit
Mode Symbol
CHIP_ID2
Description
Reset
7:0
R
Second character of device type "580" in ASCII.
0x38
Table 240: CHIP_ID3_REG (0x50003202)
Bit
Mode Symbol
CHIP_ID3
Description
Reset
7:0
R
Third character of device type "580" in ASCII.
0x30
Table 241: CHIP_SWC_REG (0x50003203)
Bit
7:4
3:0
Mode Symbol
Description
Reset
0x0
-
-
Reserved
R
CHIP_SWC
SoftWare Compatibility code.
0x0
Integer (default = 0) which is incremented if a silicon change
has impact on the CPU Firmware.
Can be used by software developers to write silicon revision
dependent code.
Table 242: CHIP_REVISION_REG (0x50003204)
Bit
Mode Symbol
REVISION_ID
Description
Reset
7:0
R
Chip version, corresponds with type number in ASCII.
0x41 = 'A', 0x42 = 'B'
0x41
Table 243: SET_FREEZE_REG (0x50003300)
Bit
Mode Symbol
Description
Reset
15:4
-
-
Reserved
0x0
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
135 of 155
© 2014 Dialog Semiconductor
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