DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 188: CLK_REF_VAL_H_REG (0x50001606)
Bit
Mode Symbol
XTAL_CNT_VAL
Description
Reset
15:0
R
Returns the upper 16 bits of XTAL16 clock cycles during the
calibration time, defined with REF_CNT_VAL
0x0
Table 189: P0_DATA_REG (0x50003000)
Bit
Mode Symbol
Description
Reset
0x0
15:8
7:0
-
-
Reserved
R/W
P0_DATA
Set P0 output register when written; Returns the value of P0
port when read
0x0
Table 190: P0_SET_DATA_REG (0x50003002)
Bit
Mode Symbol
Description
Reset
0x0
15:8
7:0
-
-
Reserved
R/W
P0_SET
Writing a 1 to P0[y] sets P0[y] to 1. Writing 0 is discarded;
Reading returns 0
0x0
Table 191: P0_RESET_DATA_REG (0x50003004)
Bit
Mode Symbol
Description
Reset
0x0
15:8
7:0
-
-
Reserved
R/W
P0_RESET
Writing a 1 to P0[y] sets P0[y] to 0. Writing 0 is discarded;
Reading returns 0
0x0
Table 192: P00_MODE_REG (0x50003006)
Bit
Mode Symbol
Description
Reset
0x0
15:10
9:8
-
-
Reserved
R/W
PUPD
00 = Input, no resistors selected
01 = Input, pull-up selected
0x2
10 = Input, Pull-down selected
11 = Output, no resistors selected
In ADC mode, these bits are don't care
7:5
-
-
Reserved
0x0
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
118 of 155
© 2014 Dialog Semiconductor
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