DM9010
Single Chip Ethernet Controller with General Processor Interface
8.3 PHY ID Identifier Register #1 (PHYID1) - 02
The PHY Identifier Registers #1 and #2 work together in a single identifier of the DM9010. The Identifier consists
of a concatenation of the Organizationally Unique Identifier (OUI), a vendor's model number, and a model
revision number. DAVICOM Semiconductor's IEEE assigned OUI is 00606E.
Bit
Bit Name
Default
<0181h> OUI Most Significant Bits
This register stores bit 3 to 18 of the OUI (00606E) to bit 15
Description
2.15-2.0 OUI_MSB
to 0 of this register respectively. The most significant two
bits of the OUI are ignored (the IEEE standard refers to these
as bit 1 and 2)
8.4 PHY ID Identifier Register #2 (PHYID2) - 03
Bit
Bit Name
Default
<101110>, OUI Least Significant Bits
RO/P Bit 19 to 24 of the OUI (00606E) are mapped to bit 15 to 10
of this register respectively
3.9-3.4 VNDR_MDL <001010>, Vendor Model Number
RO/P Five bits of vendor model number mapped to bit 9 to 4 (most
significant bit to bit 9)
<0000>, Model Revision Number
RO/P Five bits of vendor model revision number mapped to bit 3
to 0 (most significant bit to bit 4)
Description
3.15-3.1 OUI_LSB
0
3.3-3.0 MDL_REV
8.5 Auto-negotiation Advertisement Register (ANAR) - 04
This register contains the advertised abilities of this DM9010 device as they will be transmitted to its
link partner during Auto-negotiation.
Bit
Bit Name
Default
Description
4.15
NP
0,RO/P
Next page Indication
0 = No next page available
1 = Next page available
The DM9010 has no next page, so this bit is permanently set
to 0
4.14
ACK
0,RO
Acknowledge
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
The DM9010's auto-negotiation state machine will
automatically control this bit in the outgoing FLP bursts and
set it at the appropriate time during the auto-negotiation
process. Software should not attempt to write to this bit.
Remote Fault
4.13
RF
0, RW
Preliminary
35
Version: DM9010-17--DS-P04
Jan. 18, 2006