DM8203
2-port switch with MII / RMII Interface
9. Functional Description
9.1 Serial Management Interface
Host SMI
SMI_CK
SMI_DIO
(SMI device address = 0~3)
MDC
MDIO
Host / MAC
Only one host is allowed to acccess the SMI_CK, SMI_DIO
DM8203
MII SMI
MDC
MDIO
MDC
MDIO
Port2 PHY
(PHY Address =
2)
External PHY can be accessed via the MDC, MDIO
Host SMI - Read Frame Structure
SMI_CK
SMI_DIO Read
//
//
A1
R0
0
1
1
0
A0
R7
R6
R5
32 "1"s
0
D15
D14
D1
D0
Z
Device Address
Write
Idle
Idle Preamble
SFD
Op Code
Register Address
Turn Around
Data
Read
SMI_R_8203
Host SMI - Write Frame Structure
SMI_CK
SMI_DIO Write
32 "1"s
0
1
0
1
A1
A0
R7
R6
R5
R0
1
0
D15
D14
Data
D1
D0
Idle Preamble
SFD
Op Code
Device Address
Register Address
Write
Turn Around
Idle
SMI_W_8203
DM8203 supports two type of serial management
interface (SMI), Host SMI and MII SMI. The
application of SMI illustrated as below.
pin (TXD2_0 & TXD2_1). The <Register Address>
field of the frame is mapped to address of control and
status register set of DM8203. The read/writ data is
valid on low byte (D7~D0) of <Data> field, the high
byte (D15~D8) of data is reserved.
1. The Host SMI consists of two pins, one is SMI_CK
and another is SMI_DIO. User can access DM8203’s
EEPROM, PHY registers, MIB counters and
2. DM8203 supports MII SMI auto-polling for
configuring speed, duplex mode, and 802.3x flow
control capability of the external PHY (Port2) via the
MDC, MDIO. More detail description and frame
format can refer to section 9.3.2.
Configuration registers through Host SMI. The format
is following. The <Device Address> field of the frame
means SMI device address that is configured by strap
Preliminarydatasheet
DM8203-15-DS-P05
October 23, 2008
43
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
