DS1921H/Z
Overdrive Skip ROM [3Ch]
On a single-drop bus this command can save time by allowing the bus master to access the
memory/control functions without providing the 64-bit ROM code. Unlike the normal Skip ROM
command, the Overdrive Skip ROM sets the DS1921H/Z in the Overdrive mode (OD = 1). All
communication following this command has to occur at Overdrive speed until a reset pulse of minimum
480µs duration resets all devices on the bus to standard speed (OD = 0).
When issued on a multidrop bus this command will set all Overdrive-supporting devices into Overdrive
mode. To subsequently address a specific Overdrive-supporting device, a reset pulse at Overdrive speed
has to be issued followed by a Match ROM or Search ROM command sequence. This will speed up the
time for the search process. If more than one slave supporting Overdrive is present on the bus and the
Overdrive Skip ROM command is followed by a Read command, data collision will occur on the bus as
multiple slaves transmit simultaneously (open-drain pull-downs will produce a wired-AND result).
Overdrive Match ROM [69h]
The Overdrive Match ROM command followed by a 64-bit ROM sequence transmitted at Overdrive
Speed allows the bus master to address a specific DS1921H/Z on a multidrop bus and to simultaneously
set it in Overdrive mode. Only the DS1921H/Z that exactly matches the 64-bit ROM sequence will
respond to the subsequent memory/control function command. Slaves already in Overdrive mode from a
previous Overdrive Skip or successful Overdrive Match command will remain in Overdrive mode. All
overdrive-capable slaves will return to standard speed at the next Reset Pulse of minimum 480µs
duration. The Overdrive Match ROM command can be used with a single or multiple devices on the bus.
1-WIRE SIGNALING
The DS1921H/Z requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read
Data. Except for the presence pulse the bus master initiates all these signals. The DS1921H/Z can
communicate at two different speeds: standard speed and Overdrive speed. If not explicitly set into the
Overdrive mode, the DS1921H/Z will communicate at standard speed. While in Overdrive mode the fast
timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from VPUP below the threshold VTL.
To get from active to idle, the voltage needs to rise from VILMAX past the threshold VTH. The time it takes
for the voltage to make this rise is seen in Figure 14 as ‘ε’ and its duration depends on the pull-up resistor
(RPUP) used and capacitance of the 1-Wire network attached. The voltage VILMAX is relevant for the
DS1921H/Z when determining a logical level, but not for triggering any events.
The initialization sequence required to begin any communication with the DS1921H/Z is shown in Figure
14. A Reset Pulse followed by a Presence Pulse indicates the DS1921H/Z is ready to receive data, given
the correct ROM and memory function command. If the bus master uses slew-rate control on the falling
edge, it must pull down the line for tRSTL + tF to compensate for the edge. A tRSTL duration of 480µs or
longer will exit the Overdrive mode returning the device to standard speed. If the DS1921H/Z is in
Overdrive mode and tRSTL is no longer than 80µs, the device will remain in Overdrive mode.
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DALLAS [ DALLAS SEMICONDUCTOR ]
