ES51963
4 1/2 DMM
To cancel PEAK Hold function at format 2:
(V-)+2.1V
MODE 1 (A/D(tVo u-P)+) 0.8V
EOC
MODE 1 (A/D to uP)
MODE 2 (uP to A/D)
(V-)+2.1V
(V-)+0.8V
START
END
SCLK
set PEAK (S5) to L
(V-)+2.1V
(V-)+0.8V
(V-)+2.1V
PEAK Hold
STATUS
(Pmax)
(Pmin)
(V-)+0.8V
D0~D15
S0~S15
D0~D15
S0~S15
D0~D15
S0~S15
Note: After changing X10 mode at format 1 or format 2, if we want to active PEAK Hold
function, we must active calibration again.
(9) Digital Signals Rising and Falling times
The timings for rising/falling of digital signals of EOC, SCLK, and STATUS are defined
as follows:
EOC and STATUS are output to microprocessor:
V+
(V-)+2.1V
(V-)+0.8V
V-
tfo
tro
SCLK and STATUS are input from microprocessor:
Vcc
(V-)+2.1V
(V-)+0.8V
Vss
tfi
tri
Note: Vss = V-
Symbol Condition
Min
Max
20
Units
ns
tro
tfo
tri
A/D to uP
A/D to uP
uP to A/D
uP to A/D
-
-
-
-
20
ns
20
20
ns
ns
tfi
17
2003/9/1
CYRUSTEK [ Cyrustek corporation ]
