PSoC® 3: CY8C32 Family
Data Sheet
single (or few) bit failures do not deassert the WOL output. The
state of the NVL bits after wafer processing is truly random with
no tendency toward 1 or 0.
9.5 Single Wire Viewer Interface
The SWV interface is closely associated with SWD but can also
be used independently. SWV data is output on the JTAG
interface’s TDO pin. If using SWV, you must configure the device
for SWD, not JTAG. SWV is not supported with the JTAG
interface.
The WOL only locks the part after the correct 32-bit key
(0×50536F43) is loaded into the NVL's volatile memory,
programmed into the NVL's nonvolatile cells, and the part is
reset. The output of the WOL is only sampled on reset and used
to disable the access. This precaution prevents anyone from
reading, erasing, or altering the contents of the internal memory.
SWV is ideal for application debug where it is helpful for the
firmware to output data similar to 'printf' debugging on PCs. The
SWV is ideal for data monitoring, because it requires only a
single pin and can output data in standard UART format or
Manchester encoded format. For example, it can be used to tune
a PID control loop in which the output and graphing of the three
error terms greatly simplifies coefficient tuning.
The user can write the key into the WOL to lock out external
access only if no flash protection is set (see “Flash Security” on
page 22). However, after setting the values in the WOL, a user
still has access to the part until it is reset. Therefore, a user can
write the key into the WOL, program the flash protection data,
and then reset the part to lock it.
The following features are supported in SWV:
32 virtual channels, each 32 bits long
If the device is protected with a WOL setting, Cypress cannot
perform failure analysis and, therefore, cannot accept RMAs
from customers. The WOL can be read out via Serial Wire Debug
(SWD) port to electrically identify protected parts. The user can
write the key in WOL to lock out external access only if no flash
protection is set. For more information on how to take full
advantage of the security features in PSoC see the PSoC 3
TRM.
Simple, efficient packing and serializing protocol
Supports standard UART format (N81)
9.6 Programming Features
The JTAG and SWD interfaces provide full programming
support. The entire device can be erased, programmed, and
verified. You can increase flash protection levels to protect
firmware IP. Flash protection can only be reset after a full device
erase. Individual flash blocks can be erased, programmed, and
verified, if block security settings permit.
Disclaimer
Note the following details of the flash code protection features on
Cypress devices.
9.7 Device Security
Cypress products meet the specifications contained in their
particular Cypress datasheets. Cypress believes that its family of
products is one of the most secure families of its kind on the
market today, regardless of how they are used. There may be
methods, unknown to Cypress, that can breach the code
protection features. Any of these methods, to our knowledge,
would be dishonest and possibly illegal. Neither Cypress nor any
other semiconductor manufacturer can guarantee the security of
their code. Code protection does not mean that we are
guaranteeing the product as “unbreakable.”
PSoC 3 offers an advanced security feature called device
security, which permanently disables all test, programming, and
debug ports, protecting your application from external access.
The device security is activated by programming a 32-bit key
(0×50536F43) to a Write Once Latch (WOL).
The Write Once Latch is a type of nonvolatile latch (NVL). The
cell itself is an NVL with additional logic wrapped around it. Each
WOL device contains four bytes (32 bits) of data. The wrapper
outputs a ‘1’ if a super-majority (28 of 32) of its bits match a
pre-determined pattern (0×50536F43); it outputs a ‘0’ if this
majority is not reached. When the output is 1, the Write Once NV
latch locks the part out of Debug and Test modes; it also
permanently gates off the ability to erase or alter the contents of
the latch. Matching all bits is intentionally not required, so that
Cypress is willing to work with the customer who is concerned
about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously
improving the code protection features of our products.
Document Number: 001-56955 Rev. *J
Page 60 of 119
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