CY8C24x23A Final Data Sheet
1. Pin Information
1.1.2
20-Pin Part Pinout
Table 1-2. 20-Pin Part Pinout (PDIP, SSOP, SOIC)
Type
CY8C24223A 20-Pin PSoC Device
Pin
No.
Pin
Name
Description
Digital Analog
1
2
3
4
5
IO
IO
IO
IO
I
P0[7]
P0[5]
P0[3]
P0[1]
SMP
Analog column mux input.
AI, P0[7]
AIO, P0[5]
Vdd
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
IO
IO
I
Analog column mux input and column output.
Analog column mux input and column output.
Analog column mux input.
P0[6], AI
AIO, P0[3]
P0[4], AI
P0[2], AI
AI, P0[1]
PDIP
SSOP
SOIC
SMP
P0[0], AI
Power
Power
Switch Mode Pump (SMP) connection to
external components required.
I2C SCL, P1[7]
I2C SDA, P1[5]
P1[3]
XRES
P1[6]
6
IO
IO
IO
IO
P1[7]
P1[5]
P1[3]
P1[1]
Vss
I2C Serial Clock (SCL)
I2C Serial Data (SDA)
P1[4], EXTCLK
P1[2]
7
I2C SCL, XTALin, P1[1]
Vss
8
P1[0], XTALout, I2C SDA
10
9
Crystal Input (XTALin), I2C Serial Clock (SCL)
Ground connection.
10
11
IO
IO
P1[0]
Crystal Output (XTALout), I2C Serial Data
(SDA)
12
P1[2]
13
14
15
IO
IO
P1[4]
P1[6]
XRES
Optional External Clock Input (EXTCLK)
Input
Active high external reset with internal pull
down.
16
17
18
19
20
IO
IO
IO
IO
I
I
I
I
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
Analog column mux input.
Analog column mux input.
Analog column mux input.
Analog column mux input.
Supply voltage.
Power
LEGEND: A = Analog, I = Input, and O = Output.
September 8, 2004
Document No. 38-12028 Rev. *B
9
CYPRESS [ CYPRESS ]
