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CY7C67200-48BAXI 参数 Datasheet PDF下载

CY7C67200-48BAXI图片预览
型号: CY7C67200-48BAXI
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- OTG可编程的USB On - The-Go的封装选项: 48引脚FBGA [EZ-OTG Programmable USB On-The-Go Package option: 48-pin FBGA]
分类和应用:
文件页数/大小: 78 页 / 1569 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C67200
Minimum Hardware Requirements for Standalone Mode – Peripheral Only
Figure 5. Minimum Standalone Hardware Configuration – Peripheral Only
EZ-OTG
CY7C67200
VReg
VBus
D+
D-
GND
SHIELD
Bootstrap Options
Vcc Vcc
10k 10k
GPIO[30]
GPIO[31]
SCL*
SDA*
Int. 16k x8
Code / Data
VCC
A0
A1
A2
GND
Up to 64k x8
EEPROM
VCC
WP
SCL
SDA
GND, AGND,
BoostGND
*Bootloading begins after POR + 3ms BIOS bootup
*GPIO[31:30]
Up to 2k x8
>2k x8 to 64k x8
31
30
SCL SDA
SDA SCL
Reserved
XIN
12MHz
22pf
VCC, AVCC,
BoostVCC
DPlus
DMinus
nRESET
Reset
Logic
Standard-B
or Mini-B
Bootloading Firmware
XOUT
22pf
* Parallel Resonant
Fundamental Mode
500uW
20-33pf ±5%
Power Savings and Reset Description
The EZ-OTG modes and reset conditions are described in this
section.
Power Savings Mode Description
EZ-OTG has one main power savings mode, Sleep. For
detailed information on Sleep mode;
Sleep mode is used for USB applications to support USB
suspend and non USB applications as the main chip power
down mode.
In addition, EZ-OTG is capable of slowing down the CPU clock
speed through the CPU Speed register [0xC008] without
affecting other peripheral timing. Reducing the CPU clock
speed from 48 MHz to 24 MHz reduces the overall current
draw by around 8 mA while reducing it from 48 MHz to 3 MHz
reduces the overall current draw by approximately 15 mA.
Sleep
Sleep mode is the main chip power down mode and is also
used for USB suspend. Sleep mode is entered by setting the
Sleep Enable (bit 1) of the Power Control register [0xC00A].
During Sleep mode (USB Suspend) the following events and
states are true:
• GPIO pins maintain their configuration during sleep (in
suspend).
• External Memory Address pins are driven low.
• XTALOUT is turned off.
• Internal PLL is turned off.
• Firmware must disable the charge pump (OTG Control
register [0xC098]) causing OTGVBUS to drop below 0.2V.
Otherwise OTGVBUS will only drop to V
CC
– (2 schottky
diode drops).
• Booster circuit is turned off.
• USB transceivers is turned off.
• CPU suspends until a programmable wakeup event.
Document #: 38-08014 Rev. *G
Page 8 of 78