CY7C68300B/CY7C68301B
CY7C68320/CY7C68321
11.0
DC Characteristics
Parameter
Description
Supply Voltage
Conditions
Min.
3.15
200
2
Typ.
Max.
Unit
V
VCC
VCC Ramp
VIH
3.3
3.45
Supply Ramp-up 0V to 3.3V
Input High Voltage
µs
V
5.25
0.8
VIL
Input Low Voltage
–0.5
V
II
Input Leakage Current
Crystal Input HIGH Voltage
Crystal Input LOW Voltage
Output Voltage High
Output Voltage Low
0 < VIH < VCC
±10
µA
5.25
0.8
V
VIH_X
VIL_X
VOH
VOL
IOH
2
-0.5
IOUT = 4 mA
2.4
IOUT = –4 mA
0.4
4
V
Output Current High
Output Current Low
mA
mA
pF
pF
mA
mA
µA
µA
mA
mA
mA
IOL
4
CIN
Input Pin Capacitance
All but D+/D–
D+/D–
10
15
1.2
1.0
380
150
85
65
ISUSP
Suspend Current
Connected:
0.5
0.3
300
100
50
CY7C68300B/CY7C68320
Suspend Current
Disconnected:
Connected:
CY7C68301B/CY7C68321
Supply Current
Disconnected:
USB High Speed:
USB Full Speed:
ICC
IUNCONFIG
TRESET
35
Unconfigured Current
Current before device is granted full
current requested in bMaxPower
43
Reset Time After Valid Power
Pin Reset After Power-Up
VCC > 3.0V
5.0
ms
200
µs
12.2 ATA Timing
12.0 AC Electrical Characteristics
The ATA interface supports ATA PIO modes 0, 3, and 4, Ultra
DMA modes 2, 3, and 4, and multiword DMA mode 2 per the
ATA/ATAPI 6 Specification. The AT2LP will select the highest
common transfer rate.
12.1 USB Transceiver
Complies with the USB 2.0 specification.
13.0 Ordering Information
Part Number
Package Type
GPIO Pins
CY7C68300B-56PVXC
CY7C68301B-56PVXC
CY7C68300B-56LFXC
CY7C68301B-56LFXC
CY7C68320-56LFXC
CY7C68321-56LFXC
CY7C68320-100AXC
CY7C68321-100AXC
56 SSOP Lead-free for self- and bus-powered designs
56 SSOP Lead-free for battery-powered designs
56 QFN Lead-free for self- and bus-powered designs
56 QFN Lead-free for battery-powered designs
56 QFN Lead-free for self- and bus-powered designs
56 QFN Lead-free for battery-powered designs
100 TQFP Lead-free for self- and bus-powered designs
100 TQFP Lead-free for battery-powered designs
EZ-USB AT2LP Reference Design Kit
–
–
–
–
3[4]
3[4]
6
6
CY4615B
n/a
Note:
4. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320/CY7C68321.
Document 38-08033 Rev. *D
Page 31 of 36
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