CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
10.9
Slave FIFO Synchronous Write
t
IFCLK
IFCLK
t
SLWR
WRH
t
SWR
DATA
Z
N
Z
t
t
FDH
SFD
FLAGS
t
XFLG
Figure 10-9. Slave FIFO Synchronous Write Timing Diagram[20]
Table 10-9. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK[21]
Parameter
tIFCLK
Description
Min.
20.83
18.1
0
Max.
Unit
ns
IFCLK Period
tSWR
tWRH
tSFD
SLWR to Clock Set-up Time
ns
Clock to SLWR Hold Time
ns
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
9.2
ns
tFDH
tXFLG
0
ns
9.5
ns
Table 10-10. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK[21]
Parameter
tIFCLK
Description
Min.
20.83
12.1
3.6
Max.
Unit
ns
IFCLK Period
200
tSWR
tWRH
tSFD
SLWR to Clock Set-up Time
ns
Clock to SLWR Hold Time
ns
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
3.2
ns
tFDH
tXFLG
4.5
ns
13.5
ns
Document #: 38-08032 Rev. *K
Page 45 of 60
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