CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
10.7
Slave FIFO Synchronous Read
t
IFCLK
IFCLK
SLRD
t
RDH
t
SRD
t
XFLG
FLAGS
DATA
N+1
N
t
t
XFD
OEon
t
OEoff
SLOE
Figure 10-7. Slave FIFO Synchronous Read Timing Diagram[20]
Table 10-6. Slave FIFO Synchronous Read Parameters with Internally Sourced IFCLK[21]
Parameter
tIFCLK
Description
Min.
20.83
18.7
0
Max.
Unit
ns
IFCLK Period
tSRD
tRDH
tOEon
tOEoff
tXFLG
tXFD
SLRD to Clock Set-up Time
ns
Clock to SLRD Hold Time
ns
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Clock to FLAGS Output Propagation Delay
Clock to FIFO Data Output Propagation Delay
10.5
10.5
9.5
ns
ns
ns
11
ns
Table 10-7. Slave FIFO Synchronous Read Parameters with Externally Sourced IFCLK[21]
Parameter
tIFCLK
Description
Min.
20.83
12.7
3.7
Max.
Unit
ns
IFCLK Period
200
tSRD
tRDH
tOEon
tOEoff
tXFLG
tXFD
SLRD to Clock Set-up Time
ns
Clock to SLRD Hold Time
ns
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Clock to FLAGS Output Propagation Delay
Clock to FIFO Data Output Propagation Delay
10.5
10.5
13.5
15
ns
ns
ns
ns
Document #: 38-08032 Rev. *K
Page 43 of 60
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