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CY7C63723-PC 参数 Datasheet PDF下载

CY7C63723-PC图片预览
型号: CY7C63723-PC
PDF下载: 下载PDF文件 查看货源
内容描述: 的enCoRe USB的组合低速USB和PS / 2外围控制器 [enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller]
分类和应用: 微控制器和处理器外围集成电路光电二极管可编程只读存储器时钟
文件页数/大小: 58 页 / 1162 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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FOR
FOR
enCoRe™
USB CY7C63722/23
CY7C63743
1.0
Features
• enCoRe™ USB - enhanced Component Reduction
— Internal oscillator eliminates the need for an external crystal or resonator
— Interface can auto-configure to operate as PS/2 or USB without the need for external components to switch between
modes (no GPIO pins needed to manage dual mode capability)
— Internal 3.3V regulator for USB pull-up resistor
— Configurable GPIO for real-world interface without external components
• Flexible, cost-effective solution for applications that combine PS/2 and low-speed USB, such as mice, gamepads,
joysticks, and many others.
• USB Specification Compliance
— Conforms to USB Specification, Version 2.0
— Conforms to USB HID Specification, Version 1.1
— Supports 1 Low-Speed USB device address and 3 data endpoints
— Integrated USB transceiver
— 3.3V regulated output for USB pull-up resistor
• 8-bit RISC microcontroller
— Harvard architecture
— 6-MHz external ceramic resonator or internal clock mode
— 12-MHz internal CPU clock
— Internal memory
— 256 bytes of RAM
— 8 Kbytes of EPROM
— Interface can auto-configure to operate as PS/2 or USB
— No external components for switching between PS/2 and USB modes
— No GPIO pins needed to manage dual mode capability
• I/O ports
— Up to 16 versatile General Purpose I/O (GPIO) pins, individually configurable
— High current drive on any GPIO pin: 50 mA/pin current sink
— Each GPIO pin supports high-impedance inputs, internal pull-ups, open drain outputs or traditional CMOS outputs
— Maskable interrupts on all I/O pins
• SPI serial communication block
— Master or slave operation
— 2 Mbit/s transfers
• Four 8-bit Input Capture registers
— Two registers each for two input pins
— Capture timer setting with 5 prescaler settings
— Separate registers for rising and falling edge capture
— Simplifies interface to RF inputs for wireless applications
• Internal low-power wake-up timer during suspend mode
— Periodic wake-up with no external components
• Optional 6-MHz internal oscillator mode
• Watchdog Reset (WDR)
• Low-voltage Reset at 3.75V
• Internal brown-out reset for suspend mode
• Improved output drivers to reduce EMI
• Operating voltage from 4.0V to 5.5VDC
• Operating temperature from 0 to 70 degrees Celsius
• CY7C63723 available in 18-pin SOIC, 18-pin PDIP
• CY7C63743 available in 24-pin SOIC, 24-pin PDIP
• CY7C63722 available in DIE form
• Industry standard programmer support
Document #: 38-08022 Rev. **
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