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CY62128EV30LL-45ZXI 参数 Datasheet PDF下载

CY62128EV30LL-45ZXI图片预览
型号: CY62128EV30LL-45ZXI
PDF下载: 下载PDF文件 查看货源
内容描述: 1兆位( 128K ×8)静态RAM [1 Mbit (128K x 8) Static RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 11 页 / 946 K
品牌: CYPRESS [ CYPRESS ]
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CY62128EV30 MoBL®  
Thermal Resistance  
Parameter  
Description  
Test Conditions  
TSOP I  
SOIC  
STSOP  
Unit  
ΘJA  
Thermal Resistance  
(Junction to Ambient) two-layer printed circuit board  
Still Air, soldered on a 3 x 4.5 inch,  
33.01  
48.67  
32.56  
°C/W  
ΘJC  
Thermal Resistance  
(Junction to Case)  
3.42  
25.86  
3.59  
°C/W  
AC Test Loads and Waveforms  
R1  
ALL INPUT PULSES  
90%  
VCC  
VCC  
OUTPUT  
90%  
10%  
10%  
R2  
GND  
Rise Time = 1 V/ns  
30 pF  
Fall Time = 1 V/ns  
INCLUDING  
JIG AND  
Equivalent to:  
THEVENIN EQUIVALENT  
SCOPE  
RTH  
OUTPUT  
V
Parameters  
2.50V  
16667  
15385  
8000  
3.0V  
1103  
1554  
645  
Unit  
R1  
R2  
RTH  
VTH  
1.20  
1.75  
V
Data Retention Characteristics (Over the Operating Range)  
Parameter  
Description  
VCC for Data Retention  
Data Retention Current  
Conditions  
Min Typ[3] Max Unit  
VDR  
1.5  
V
[7]  
ICCDR  
VCC = 1.5V,  
Ind’l/Auto-A  
Auto-E  
3
µA  
µA  
CE1 > VCC 0.2V or CE2 < 0.2V,  
IN > VCC 0.2V or VIN < 0.2V  
30  
V
[8]  
tCDR  
Chip Deselect to Data Retention  
Time  
0
ns  
ns  
[9]  
tR  
Operation Recovery Time  
tRC  
Data Retention Waveform [10]  
DATA RETENTION MODE  
VCC(min)  
VCC(min)  
V
DR  
> 1.5V  
VCC  
CE  
t
t
R
CDR  
Notes:  
9. Full device AC operation requires linear V ramp from V to V  
> 100 µs or stable at V  
2
> 100 µs.  
CC(min)  
CC  
DR  
CC(min)  
10. CE is the logical combination of CE and CE . When CE is LOW and CE is HIGH, CE is LOW; when CE is HIGH or CE is LOW, CE is HIGH.  
1
2
1
1
2
Document #: 38-05579 Rev. *C  
Page 4 of 11  
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