CY2273A
Switching Characteristics for CY2273A-1, CY2273A-2
[8]
Over the Operating Range
Parameter
t
1
t
2
t
2
All
CPUCLK
SDRAM, PCI,
REF0, USB
AGP (-2 only)
CPUCLK
CPUCLK
CPUCLK
CPUCLK,
PCICLK
CPUCLK,
SDRAM
PCICLK,
PCICLK
PCICLK,
AGP (-2 only)
CPUCLK,
SDRAM
PCICLK,
AGP (-2 only)
CPUCLK,
PCICLK,
AGP (-2 only),
SDRAM
Output
Description
Test Conditions
Min.
45
0.75
0.85
Typ.
50
Max.
55
4.0
4.0
Unit
%
V/ns
V/ns
Output Duty Cycle
[9, 10]
t
1
= t
1A
÷
t
1B
CPU Clock Rising and Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Falling Edge Rate
[10]
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
SDRAM, PCI, REF0
Clock Rising and Fall-
ing Edge Rate
[10]
AGP Rising and Falling
Edge Rate
CPU Clock Rise Time
CPU Clock Fall Time
CPU-CPU Clock Skew
CPU-PCI Clock Skew
CPU-SDRAM Clock
Skew
[10]
PCI-PCI Clock Skew
PCICLK-AGP Clock
Skew (-2 only)
Cycle-Cycle Clock
Jitter
[10]
Cycle-Cycle Clock
Jitter
[10]
Power-up Time
Between 0.4V and 2.4V
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
10
t
11
Between 0.4V and 2.4V
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
Between 2.0V and 0.4V, V
DDCPU
= 2.5V
Between 2.4V and 0.4V, V
DDCPU
= 3.3V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.5V, V
DDCPU
= 3.3V
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
Measured at 1.5V
Measured at 1.5V
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
Measured at 1.5V
CPU, PCI, AGP, and SDRAM clock sta-
bilization from power-up
0.85
0.4
0.5
0.4
0.5
100
1.0
3.0
4.0
2.13
2.67
2.13
2.67
250
5.5
650
500
500
250
500
3
V/ns
ns
ns
ps
ns
ps
ps
ps
ps
ps
ms
Notes:
8. All parameters specified with loaded outputs.
9. Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
10. Measured at CPU=66.6 MHz, SDRAM=66.6 MHz, PCI=33.3 MHz, AGP=66.6 MHz.
7
CYPRESS [ CYPRESS SEMICONDUCTOR ]
