SPI Flash Timing
BCM43907 Preliminary Data Sheet
Memory Fast-Read Timing
Figure 33 shows the SPI flash extended and quad memory fast-read timing.
Note: Regarding Figure 33:
1. 24-bit addressing is used, so A[MAX] = A[23] and A[MIN] = A[0].
2. For an extended SPI protocol, C = 7 + (A[MAX] + 1).
x
3. For a quad SPI protocol, C = 1 + (A[MAX] + 1)/4.
x
Figure 33: Memory Fast-Read Timing
0
7
8
Cx
Extended
C
A[MIN]
LSB
DQ0
DQ1
Command
High-Z
MSB
A[MAX]
LSB
DOUT
MSB
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
Dummy Cycles
0
1
2
Cx
Quad
C
LSB
DOUT
A[MIN]
LSB
DQ[3:0]
Command
DOUT
MSB
DOUT
MSB
A[MAX]
Dummy Cycles
Don’t care
Broadcom®
March 12, 2016 • 43907-DS104-R
Page 114
BROADCOM CONFIDENTIAL
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