BCM43907 Preliminary Data Sheet
I2S Master and Slave Mode TX Timing
Table 43: Timing for I2S Transmitters and Receivers
Transmitter
Receiver
Lower Limit
Lower Limit
Upper Limit
Minimum Maximum
Parameter
Minimum
Maximum
Minimum Maximum
Clock HIGH, t
–
–
–
–
0
–
–
0.35T
–
–
–
–
–
–
–
–
–
0.35T
HC
r
r
r
r
Clock LOW, t
0.35T
–
–
0.35T
LC
Clock rise time, t
–
–
–
–
–
0.15T
–
–
–
–
RC
tr
Transmitter delay, t
–
–
–
–
0.8T
dtr
Transmitter hold time, t
–
–
–
htr
Receiver setup time, t
0.2T
0
sr
r
Receiver hold time, t
hr
Table 44 provides the I2S_MCLK specification.
Table 44: I2S_MCLK Specification
Parameter
Minimum
Typical
Maximum
Unit
Frequency range
1
–
40
–
MHz
Frequency accuracy (with respect to the XTAL frequency) –
1
ppb
Tuning resolution
–
–
–
–
–
–
50
–
ppb
Tuning range
1000
–
ppm
Tuning step size
–
1
–
–
10
–
ppm
Tuning rate
ppm/ms
ps rms
ps rms
Baseband jitter (100 Hz to 40 kHz)
Wideband jitter (100 Hz to 1 MHz)
100
200
2
Figure 23 shows the I S frame-level timing.
2
Figure 23: I S Frame-Level Timing
1/fs
I2S_LRCLK
I2S_SCLK
I/O Data
Left Channel
Right Channel
1 clock
1 clock
1
2
3
n – 2 n – 1
n
1
2
3
n – 2 n – 1
n
MSB
LSB
MSB
LSB
Broadcom®
March 12, 2016 • 43907-DS104-R
Page 104
BROADCOM CONFIDENTIAL
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