BCM43907 Preliminary Data Sheet
I2S Master and Slave Mode TX Timing
I2S Master and Slave Mode TX Timing
2
Figure 21 and Table 43 on page 103 provide the I S Master mode transmitter timing.
2
Figure 21: I S Master Mode Transmitter Timing
T
t
HC = 0.35T
t
RC
V
V
t
H = 2.0V
L = 0.8V
LC = 0.35T
I2S_SCLK
t
htr = 0
t
dtr = 0.8T
I2S_SDATO
and I2S_LRCK
T = Clock period.
Ttr = Minimum allowed clock period for transmitter.
T > Ttr.
t
RC is only relevant for transmitters in Slave mode.
2
Figure 22 and Table 43 on page 103 provide the I S Slave mode receiver timing.
2
Figure 22: I S Slave Mode Receiver Timing
T
tHC = 0.35T
V
V
H = 2.0V
L = 0.8V
tLC = 0.35T
I2S_SCLK
tsr = 0.2T
thr = 0
I2S_SDATAI
and I2S_LRCK
T = Clock period.
Tr = Minimum allowed clock period for the transmitter.
T > Tr.
Table 43: Timing for I2S Transmitters and Receivers
Transmitter
Receiver
Lower Limit
Lower Limit
Minimum Maximum
Upper Limit
Minimum Maximum
Parameter
Minimum Maximum
Clock period T
Slave mode:
T
–
–
–
T
–
tr
tr
Broadcom®
March 12, 2016 • 43907-DS104-R
Page 103
BROADCOM CONFIDENTIAL
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