PRELIMINARY
CYW43438
The timer value is 0 when the resource is enabled or disabled and nonzero during state transition. The timer is loaded with the time_on
or time_off value of the resource when the PMU determines that the resource must be enabled or disabled. That timer decrements
on each 32.768 kHz PMU clock. When it reaches 0, the state changes from transition_off to disabled or transition_on to enabled. If
the time_on value is 0, the resource can transition immediately from disabled to enabled. Similarly, a time_off value of 0 indicates that
the resource can transition immediately from enabled to disabled. The terms enable sequence and disable sequence refer to either
the immediate transition or the timer load-decrement sequence.
During each clock cycle, the PMU sequencer performs the following actions:
■ Computes the required resource set based on requests and the resource dependency table.
■ Decrements all timers whose values are nonzero. If a timer reaches 0, the PMU clears the ResourcePending bit for the resource
and inverts the ResourceState bit.
■ Compares the request with the current resource status and determines which resources must be enabled or disabled.
■ Initiates a disable sequence for each resource that is enabled, no longer being requested, and has no powered-up dependents.
■ Initiates an enable sequence for each resource that is disabled, is being requested, and has all of its dependencies enabled.
2.5 Power-Off Shutdown
The CYW43438 provides a low-power shutdown feature that allows the device to be turned off while the host, and any other devices
in the system, remain operational. When the CYW43438 is not needed in the system, VDDIO_RF and VDDC are shut down while
VDDIO remains powered. This allows the CYW43438 to be effectively off while keeping the I/O pins powered so that they do not draw
extra current from any other devices connected to the I/O.
During a low-power shutdown state, provided VDDIO remains applied to the CYW43438, all outputs are tristated, and most input
signals are disabled. Input voltages must remain within the limits defined for normal operation. This is done to prevent current paths
or create loading on any digital signals in the system, and enables the CYW43438 to be fully integrated in an embedded device and
to take full advantage of the lowest power-savings modes.
When the CYW43438 is powered on from this state, it is the same as a normal power-up, and the device does not retain any
information about its state from before it was powered down.
2.6 Power-Up/Power-Down/Reset Circuits
The CYW43438 has two signals (see Table 2) that enable or disable the Bluetooth and WLAN circuits and the internal regulator blocks,
allowing the host to control power consumption. For timing diagrams of these signals and the required power-up sequences, see
Section 22.: “Power-Up Sequence and Timing” .
Table 2. Power-Up/Power-Down/Reset Control Signals
Signal
Description
This signal is used by the PMU (with BT_REG_ON) to power-up the WLAN section. It is also OR-gated with the
BT_REG_ON input to control the internal CYW43438 regulators. When this pin is high, the regulators are enabled
and the WLAN section is out of reset. When this pin is low, the WLAN section is in reset. If BT_REG_ON and
WL_REG_ON are both low, the regulators are disabled. This pin has an internal 200 k pull-down resistor that
is enabled by default. It can be disabled through programming.
WL_REG_ON
This signal is used by the PMU (with WL_REG_ON) to decide whether or not to power down the internal
CYW43438 regulators. If BT_REG_ON and WL_REG_ON are low, the regulators will be disabled. This pin has
an internal 200 k pull-down resistor that is enabled by default. It can be disabled through programming.
BT_REG_ON
Document Number: 002-14796 Rev. *K
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