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BCM43362KUBG 参数 Datasheet PDF下载

BCM43362KUBG图片预览
型号: BCM43362KUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, CMOS, PBGA69, WLBGA-69]
分类和应用: 电信电信集成电路
文件页数/大小: 60 页 / 5201 K
品牌: CYPRESS [ CYPRESS ]
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CYW43362  
Automatic gain control scheme for blocking and non blocking application scenario for cellular applications.  
Closed loop transmit power control  
Supports per packet Rx Antenna diversity.  
Designed to meet FCC and other regulatory requirements.  
Figure 18. WLAN PHY Block Diagram  
CCK/DSSS  
Demodulate  
Filters  
and  
Radio  
Comp  
Frequency  
and Timing  
Synch  
Descramble  
and  
Deframe  
OFDM  
Demodulate  
Viterbi  
Decoder  
Carrier Sense,  
AGC, and Rx  
FSM  
Buffers  
Radio  
Control  
Block  
MAC  
Interface  
FFT/IFFT  
AFE  
and  
Radio  
Modulation  
and Coding  
Tx FSM  
Frame and  
Scramble  
Filters and  
Radio Comp  
Modulate/  
Spread  
PA Comp  
COEX  
The PHY is capable of fully calibrating the RF front-end to extract the highest performance. On power-up, the PHY performs a full  
calibration suite to correct for IQ mismatch and local oscillator leakage. The PHY also performs periodic calibration to compensate  
for any temperature related drift, thus maintaining high-performance over time. A closed loop transmit control algorithm maintains  
the output power to required level with capability control Tx power on a per packet basis.  
One of the key feature of the PHY is two space-time stream receive capability. The STBC scheme can obtain diversity gains by using  
multiple transmit antennas in AP (Access Point) in a fading channel environment, without increasing the complexity at the STA.  
Details of the STBC receive are shown in the block diagram in Figure 19 on page 28.  
Document No. 002-14779 Rev. *G  
Page 27 of 60  
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