PRELIMINARY
CYW43340
■ Fixed frequency constant receiver mode
❐ Receiver output directed to I/O pin
❐ Allows for direct BER measurements using standard RF test equipment
❐ Facilitates spurious emissions testing for receive mode
■ Fixed frequency constant transmission
❐ Eight-bit fixed pattern or PRBS-9
❐ Enables modulated signal measurements with standard RF test equipment
5.4 Bluetooth Power Management Unit
The Bluetooth Power Management Unit (PMU) provides power management features that can be invoked by either software through
power management registers or packet handling in the baseband core. The power management functions provided by the CYW43340
are:
■ RF Power Management
■ Host Controller Power Management
■ BBC Power Management
5.4.1 RF Power Management
The BBC generates power-down control signals for the transmit path, receive path, PLL, and power amplifier to the 2.4 GHz trans-
ceiver. The transceiver then processes the power-down functions accordingly.
5.4.2 Host Controller Power Management
When running in UART mode, the CYW43340 may be configured so that dedicated signals are used for power management hand-
shaking between the CYW43340 and the host. The basic power saving functions supported by those hand-shaking signals include
the standard Bluetooth defined power savings modes and standby modes of operation.
Table 5 describes the power-control hand-shake signals used with the UART interface.
Table 5. Power Control Pin Description
Signal
Type
Description
BT_DEV_WAKE
I
Bluetooth device wake-up: Signal from the host to the CYW43340 indicating that the host requires
attention.
■ Asserted: The Bluetooth device must wake-up or remain awake.
■ Deasserted: The Bluetooth device may sleep when sleep criteria are met.
The polarity of this signal is software configurable and can be asserted high or low.
BT_HOST_WAKE
CLK_REQ
O
O
Host wake up. Signal from the CYW43340 to the host indicating that the CYW43340 requires attention.
■ Asserted: host device must wake-up or remain awake.
■ Deasserted: host device may sleep when sleep criteria are met.
The polarity of this signal is software configurable and can be asserted high or low.
The CYW43340 asserts CLK_REQ when Bluetooth, or WLAN directs the host to turn on the reference
clock. The CLK_REQ polarity is active-high. Add an external 100 kΩ pull-down resistor to ensure the
signal is deasserted when the CYW43340 powers up or resets when VDDIO is present.
Note: Pad function Control Register is set to 0 for these pins.
Document Number: 002-14943 Rev. *L
Page 18 of 96
CYPRESS [ CYPRESS ]
