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BCM43340HKUBG 参数 Datasheet PDF下载

BCM43340HKUBG图片预览
型号: BCM43340HKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip, Dual-Band (2.4 GHz/5 GHz) IEEE 802.11 a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth 4.0]
分类和应用:
文件页数/大小: 96 页 / 1349 K
品牌: CYPRESS [ CYPRESS ]
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PRELIMINARY  
CYW43340  
3. Frequency References  
An external crystal is used for generating all radio frequencies and normal operation clocking. As an alternative, an external frequency  
reference driven by a temperature-compensated crystal oscillator (TCXO) signal may be used. In addition, a low-power oscillator  
(LPO) is provided for lower power mode timing.  
Note: The crystal and TCXO implementations have different power supplies (WRF_XTAL_VDD1P2 for crystal,  
WRF_TCXO_VDD for TCXO).  
3.1 Crystal Interface and Clock Generation  
The CYW43340 can use an external crystal to provide a frequency reference. The recommended configuration for the crystal oscillator  
including all external components is shown in Figure 4. Consult the reference schematics for the latest configuration.  
Figure 4. Recommended Oscillator Configuration  
C
WRF_XTAL_OP  
12–27 pF  
C
X ohms*  
WRF_XTAL_ON  
12–27 pF  
* Resistor value  
determined by crystal  
drive level. See reference  
schematics for details.  
A fractional-N synthesizer in the CYW43340 generates the radio frequencies, clocks, and data/packet timing, enabling it to operate  
using a wide selection of frequency references.  
For SDIO and HSIC applications the default frequency reference is a 37.4 MHz crystal or TCXO. The signal characteristics for the  
crystal interface are listed in Table 3 on page 12.  
Note: Although the fractional-N synthesizer can support alternative reference frequencies, frequencies other than the  
default require support to be added in the driver, plus additional extensive system testing. Contact Cypress for further  
details.  
3.2 TCXO  
As an alternative to a crystal, an external precision TCXO can be used as the frequency reference, provided that it meets the Phase  
Noise requirements listed in Table 3. When the clock is provided by an external TCXO, there are two possible connection methods,  
as shown in Figure 5 and Figure 6:  
1. If the TCXO is dedicated to driving the CYW43340, it should be connected to the WRF_XTAL_OP pin through an external 1000  
pF coupling capacitor, as shown in Figure 5. The internal clock buffer connected to this pin will be turned OFF when the CYW43340  
goes into sleep mode. When the clock buffer turns ON and OFF there will be a small impedance variation. If the TCXO is to be  
shared with another device, such as a GPS receiver, and impedance variation is not allowed, a dedicated external clock buffer will  
be needed. Power must be supplied to the WRF_XTAL_VDD1P2 pin.  
2. For 2.4 GHz operation only, an alternative is to DC-couple the TCXO to the WRF_TCXO_CK pin, as shown in Figure 6. Use this  
method when the same TCXO is shared with other devices and a change in the input impedance is not acceptable because it may  
cause a frequency shift that cannot be tolerated by the other device sharing the TCXO. This pin is connected to a clock buffer  
powered from WRF_TCXO_VDD. If the power supply to this buffer is always on (even in sleep mode), the clock buffer is always  
on, thereby ensuring a constant input impedance in all states of the device. The maximum current drawn from WRF_TCXO_VDD  
is approximately 500 µA.  
Document Number: 002-14943 Rev. *L  
Page 11 of 96  
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