PRELIMINARY
CYW43340
2. Power Supplies and Power Management
2.1 Power Supply Topology
One Buck regulator, multiple LDO regulators, and a Power Management Unit (PMU) are integrated into the CYW43340. All regulators
are programmable via the PMU. These blocks simplify power supply design for Bluetooth, and WLAN in embedded designs.
A single VBAT (2.9–4.8V) and VIO supply (1.8V to 3.3V) can be used, with all additional voltages being provided by the regulators in
the CYW43340.
Two control signals, BT_REG_ON and WL_REG_ON, are used to power-up the regulators and take the respective section out of
reset. The CBUCK CLDO and LNLDO power up when any of the reset signals are deasserted. All regulators are powered down only
when both BT_REG_ON and WL_REG_ON are deasserted. The CLDO and LNLDO may be turned off/on based on the dynamic
demands of the digital baseband.
The CYW43340 allows for an extremely low power-consumption mode by completely shutting down the CBUCK, CLDO, and LNDLO
regulators. When in this state, LPLDO1 and LPLDO2 (which are low-power linear regulators that are supplied by the system VIO
supply) provide the CYW43340 with all the voltages it requires, further reducing leakage currents.
2.1.1 CYW43340 PMU Features
■ VBAT to 1.35Vout (372 mA maximum) Core-Buck (CBUCK) switching regulator
■ VBAT to 3.3Vout (450 mA maximum) LDO3P3 (external-capacitor)
■ VBAT to 2.5Vout (70 mA maximum) LDO2P5 (external-capacitor)
■ 1.35V to 1.2Vout (100 mA maximum) LNLDO (external-capacitor)
■ 1.35V to 1.2Vout (150 mA maximum) CLDO (external-capacitor)
■ 1.35V to 1.2Vout (80 mA maximum) HSICDVDD LDO (external-capacitor)
■ Additional internal LDOs (not externally accessible)
Figure 3 on page 8 shows the regulators and a typical power topology.
Document Number: 002-14943 Rev. *L
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