BCM4330 Preliminary Data Sheet
HSIC Interface
HSIC Interface
As an alternative to SDIO, an HSIC host interface can be enabled using the strapping option pins
strap_host_ifc_[3:1] (Table 19: “WLAN GPIO Functions and Strapping Options,” on page 112. HSIC is a
simplified derivative of the USB2.0 interface designed to replace a standard USB PHY and cable for short
distances (up to 10 cm) on board point-to-point connections. Using two signals, a bidirectional data strobe
(STROBE) and a bidirectional DDR data signal (DATA), it provides high-speed serial 480 Mbps USB transfers that
are 100% host driver compatible with traditional USB 2.0 cable-connected topologies.
Figure 33 shows the blocks in the HSIC device core.
A clock reference frequency of 37.4 MHz should always be used for HSIC mode.
Key features of HSIC include:
• High-speed 480 Mbps data rate only
• Source-synchronous serial interface using 1.2V LVCMOS signal levels
• No power consumed except when a data transfer is in progress
• Maximum trace length of 10 cm.
• No Plug-n-Play support, no hot attach/removal
32-Bit On-Chip Communication System
DMA Engines
s
F I F T O X
T X F I F O
F I F T O X s
F I F T O X s
F I F T O X
s
s
RX FIFO
TX FIFOs
Endpoint Management Unit
USB 2.0 Protocol Engine
HSIC PHY
Strobe
Data
Figure 33: HSIC Device Block Diagram
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BCM4330 Preliminary Data Sheet
April 28, 2011 • 4330-DS304-RI
Page 84
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