CYW20702
Figure 11. Startup Timing from Power-on Reset
trampmax = 200 μs
VDDIO, VBAT,REG_EN
VREG
VDDC > 0.8V
t = 800 μs
tmin= 1.5 ms
Internal POR
μs
t = 64 to 171
GPIO5 (CLK_REQ)
tmax = 4.2 ms
XTAL/TCXO
LPO
9.2.2 USB Full-Speed Timing
Table 21 through Table 26 shows timing specifications for VDD_USB = 3.3V, VSS = 0V, and TA = 0 to 85oC operating temperature
range.
Table 21. USB Full-Speed Timing Specifications
Reference
Characteristics
Minimum
Maximum
20
Unit
1
2
3
4
Transition rise time
Transition fall time
4
4
ns
ns
%
20
Rise/fall timing matching
Full-speed data rate
90
111
12 – 0.25%
12 + 0.25%
Mb/s
Figure 12. USB Full-Speed Timing
2
1
D+
90%
90%
VCRS
10%
10%
D-
Document Number: 002-14773 Rev. *L
Page 40 of 55
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