CYW20738
Table 9. GPIO Pin Descriptionsa (Cont.)
Pin Number
Default Di-
rection
Power Do-
main
Pin Name
After POR
Alternate Function Description
40-pin
QFN
64-pin
BGA
26
E6
P5
Input
Floating
VDDO ■ GPIO: P5
■ Keyboard scan input (row): KSI5
■ Quadrature: QDY1
■ Peripheral UART: puart_tx
■ SPI_2: MISO (master and slave)
27
F5
P6
PWM2
Input
Floating
VDDO ■ GPIO: P6
■ Keyboard scan input (row): KSI6
■ Quadrature: QDZ0
■ Peripheral UART: puart_rts
■ SPI_2: SPI_CS (slave only)
■ 60Hz_main
28
C5
P7
Input
Floating
VDDO ■ GPIO: P7
■ Keyboard scan input (row): KSI7
■ Quadrature: QDZ1
■ Peripheral UART: puart_cts
■ SPI_2: SPI_CLK (master and slave)
29
3
F4
A1
P8
P9
Input
Input
Floating
Floating
VDDO ■ GPIO: P8
■ Keyboard scan output (column): KSO0
■ A/D converter input
■ External T/R switch control: ~tx_pd
VDDO ■ GPIO: P9
■ Keyboard scan output (column): KSO1
■ A/D converter input
■ External T/R switch control: tx_pd
2
D2
C2
P10
PWM3
Input
Input
Floating
Floating
VDDO ■ GPIO: P10
■ Keyboard scan output (column): KSO2
■ A/D converter input
40
P11
P12
VDDO ■ GPIO: P11
■ Keyboard scan output (column): KSO3
■ A/D converter input
■ XTALI32K (40-QFN only)
39
B2
Input
Floating
VDDO ■ GPIO: P12
■ Keyboard scan output (column): KSO4
■ A/D converter input
■ XTALO32K (40-QFN only)
Document Number: 002-14891 Rev. *C
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